1. Field of the invention
The present invention relates to an apparatus for controlling an activation period of a word line of a volatile memory device and a method thereof, an more particularly to an apparatus for controlling an activation period of a word line of a volatile memory device and a method thereof that can make the activation period of the word line different according to an operation mode of the volatile memory device.
2. Description of the Prior Art
As is well known, a volatile memory device (hereinafter referred to as a memory device) performs a refresh operation for a predetermined time in order to prevent loss of data stored in memory cells.
The refresh operation is classified into an auto-refresh operation that is performed by an external command and a self-refresh operation that is performed in the memory device itself. The present invention specially refers to the self-refresh operation.
Generally, the self-refresh operation is as follows.
If a self-refresh flag signal that indicates the self-refresh operation is enabled, an address signal is generated by an internal counter circuit of the memory device, and a word line corresponding to the generated address signal is activated.
If the word line is activated, a charge sharing occurs between the memory cell and a bit line, and the potential level on the bit line is changed.
A sense amplifier that has sensed the level change on the bit line amplifies and restores the level change in the memory cell. If the restoring operation is completed, the word line is inactivated and the bit line is precharged by an auto-precharge command.
As described above, during the self-refresh operation, the word line is activated for a predetermined time. Here, the time period in which the word line is activated is necessary for restoring the data in the memory cell. The activation of the word line for the predetermined time is performed in the same manner in a normal operation such as a read operation.
Meanwhile, it is not required that the time period in which the word line is activated in a self-refresh mode is equal to the time period in which the word line is activated in a normal operation mode. This is because although the minimum time period, in which the word line should be kept activated due to a data processing speed and so on, has been determined by a specification of the memory device in the normal operation mode, the time period for the word line activation in the self-refresh mode may be lengthened in comparison to that in the normal operation mode since the safe restoring of the data in the memory cell is more important than the data processing speed in the self-refresh mode.
However, the conventional apparatus for controlling the activation period of the word line outputs a pulse signal having a constant pulse width irrespective of the operation mode of the memory device. Accordingly, the same time period for the word line activation is provided irrespective of the operation mode.
Generally, if the characteristic of the memory cell is good, it is no hindrance to set the word line activation period to a constant value irrespective of the operation mode.
However, if the characteristic of the memory cell is not good, the situation changes. This is because if the characteristic of the memory cell is not good, a sufficient time period for restoring the data in the memory cell is required.
This will now be explained in more detail with reference to FIGS. 1a and 1b.
FIGS. 1a and 1b are views explaining the characteristics of the memory cell and the memory cell transistor. In FIG. 1a, the term “ln(Id)” denotes a drain current, and “Vgs” denotes a gate-source voltage of the transistor.
As illustrated in FIG. 1b, in the case of the characteristic A of the memory cell transistor, data can be restored within a specified time period t1, but in the case of the characteristic B of the memory cell transistor, the time period t1 is insufficient to complete the restoring of the data. That is, as shown in FIG. 1b, in the case of the characteristic B of the memory cell transistor, a specified time period t2 is required to restore the data. Accordingly, in consideration of the characteristics of the memory cell transistor, it is necessary to control the activation period of the word line according to the operation mode of the memory device.
However, the conventional apparatus has the drawbacks in that since the activation period of the word line is constant irrespective of the operation mode of the memory device, it is difficult to control the time period required to restore the data according to the operation mode or the characteristic of the memory cell.